This application related to mixed-signal processing (MSP) systems, and in particular to serial interfaces to an MSP chip.
One important consideration of the design of any chip package is that of providing as much functionality as possible while requiring as small an area and as few external connections as possible. In chips with many or complex functions, many external pins are required to allow for all necessary control, power, and data signals. It is therefore desirable that any particular function be designed in such a way as to require as few pins as possible.
Another important consideration in the design of a processing system is flexibility of use. Each chip will necessarily be connected to other devices providing input, output, and control signals, so it is advantageous if the chip can accommodate as wide a range of peripheral devices as possible.
Flexible Serial Interface
This application presents a mixed-signal processor (MSP) chip with a flexible serial interface which simultaneously accommodates two serial ports on a reduced number of pins. The pin definitions of these serial ports are configured to function well with several different external chips. Any two of these chips, or two of any one of these chips, may be used concurrently by the present MSP. When used with chips that require it, the present MSP chip provides a clock signal to each of these. When used with other chips, the MSP can receive a clock signal from an external chip, and will then pass this signal through to any chip on the other of the two serial ports.
Particular advantages of the chip of the preferred embodiment include:
1) a minimum number of required pins (5 for two ports) PA1 2) flexibility in the sampling rate (e.g. 7.2 KHz or 8.0 KHz) PA1 3) flexibility in configuration (up to two interface chips in multiple configurations) PA1 4) a minimum number of registers is required (e.g. two 16-bit data registers and one 5-bit register) PA1 5) supports the use of two simultaneous channels.